mcspi接口没时钟信号，是什么原因？

user5052112

Intellectual 810 points

由于mcspi突然运行结果不正确了，于是测试了引脚，结果时钟引脚没有信号。

下面是有关初始化的配置：

系统时钟100M

/* Enable clocks to all peripherals */
SYS_PCGCR1 = 0x0000;
SYS_PCGCR2 = 0x0000;

#define preg2 *(volatile ioport Uint16*)(0x1c3b)

preg2 = 0;//处于正常工作范围

/* Configure EBSR for McSPI */
SYS_EXBUSSEL &= ~0x0C00; // Clear SP1MODE
SYS_EXBUSSEL |= 0x0400; // Set SP1MODE to McSPI
SYS_PRCNTRLR &= ~0x0020; // Make sure Mcspi is out of reset

/* Reset SPI */
MCSPI_SYSCONFIGL |= 0x02; // Bit is automatically reset by hardware
/* Wait for reset to complete */
while(MCSPI_SYSSTATUSL & 0x01 == 0x00);

/* Configure MCSPI Module */
MCSPI_MODULCTRLL = 0
| ( 0 << 8 ) // Data managed by MCSPI_TX(i) and MCSPI_RX(i) registers
| ( 0 << 7 ) // Multiple word access disabled
| ( 0 << 4 ) // No delay for first spi transfer
| ( 0 << 3 ) // Functional mode
| ( 0 << 2 ) // Master
| ( 0 << 1 ) // SPIEN is used as a chip select
| ( 1 << 0 );// Only one channel will be used in master mode

MCSPI_CH0CONFL = 0
| ( 0 << 15 ) // DMA Read Request disabled
| ( 0 << 14 ) // DMA Write Request disabled
| ( 0 << 12 ) // Transmit and Receive mode
| ( 7 << 7 ) // SPI word length = 8
| ( 1 << 6 ) // SPIEN is held high during the active state
| ( 8 << 2 ) // CLKD = 8 Clock devider
| ( 0 << 1 ) // *** is held high during the active state
| ( 0 << 0 );// Data are latched on even numbered edges of ***
MCSPI_CH0CONFU = 0
| ( 0 << 13 ) // Clock divider granularity of power of two
| ( 1 << 12 ) // The buffer is used to receive data
| ( 1 << 11 ) // The buffer is used to transmit data
| ( 1 << 9 ) // 1.5 cycles between CS toggling and first or last edge of SPI clock
| ( 0 << 8 ) // Start bit polarity
| ( 0 << 7 ) // Disable start bit
| ( 0 << 4 ) // SPIEN active between SPI words
| ( 0 << 3 ) // Turbo is deactivated
| ( 1 << 2 ) // Data Line0 selected for reception
| ( 1 << 1 ) // Data Line1 selected for transmission
| ( 0 << 0 );// No transmission on Data Line0