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5517仿真器问题

Other Parts Discussed in Thread: TMS320C5517, TPS65023

大家好,请教一个问题。

自己画的板子,芯片用的是TMS320C5517.在进行JTAG仿真时遇到Error connecting to target(Error -1063 @0x0) Device ID is not recognized or not supported by driver.

我用同样的仿真器连接到5517的开发板上,下程序就正常了,请问这个可能是什么原因引起的呢???

提前谢过各位的解答

  • 原理图贴上来。量过时钟没有?

  • 请量一下JTAG信号是否正确?
    http://processors.wiki.ti.com/index.php/Debugging_JTAG_Connectivity_Problems#Invalid_device_ID

  • 你好,请问一下JTAG信号怎么看???现在能看到TCK上有和CCS设置一样频率的时钟信号,TDI和TDO上信号只能看出有数。

    点击Test connection时测试回复success

  • [Start: Texas Instruments XDS100v3 USB Emulator_0]

    Execute the command:

    %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

    [Result]


    -----[Print the board config pathname(s)]------------------------------------

    C:\Users\Tay\AppData\Local\TEXASI~1\CCS\
    ti\0\0\BrdDat\testBoard.dat

    -----[Print the reset-command software log-file]-----------------------------

    This utility has selected a 100- or 510-class product.
    This utility will load the adapter 'jioserdesusbv3.dll'.
    The library build date was 'May 21 2014'.
    The library build time was '17:19:59'.
    The library package version is '5.1.507.0'.
    The library component version is '35.34.40.0'.
    The controller does not use a programmable FPGA.
    The controller has a version number of '4' (0x00000004).
    The controller has an insertion length of '0' (0x00000000).
    This utility will attempt to reset the controller.
    This utility has successfully reset the controller.

    -----[Print the reset-command hardware log-file]-----------------------------

    The scan-path will be reset by toggling the JTAG TRST signal.
    The controller is the FTDI FT2232 with USB interface.
    The link from controller to target is direct (without cable).
    The software is configured for FTDI FT2232 features.
    The controller cannot monitor the value on the EMU[0] pin.
    The controller cannot monitor the value on the EMU[1] pin.
    The controller cannot control the timing on output pins.
    The controller cannot control the timing on input pins.
    The scan-path link-delay has been set to exactly '0' (0x0000).

    -----[The log-file for the JTAG TCLK output generated from the PLL]----------

    Test Size Coord MHz Flag Result Description
    ~~~~ ~~~~ ~~~~~~~ ~~~~~~~~ ~~~~ ~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~
    1 512 - 01 00 500.0kHz O good value measure path length
    2 512 + 00 00 1.000MHz [O] good value apply explicit tclk

    There is no hardware for measuring the JTAG TCLK frequency.

    In the scan-path tests:
    The test length was 16384 bits.
    The JTAG IR length was 38 bits.
    The JTAG DR length was 1 bits.

    The IR/DR scan-path tests used 2 frequencies.
    The IR/DR scan-path tests used 500.0kHz as the initial frequency.
    The IR/DR scan-path tests used 1.000MHz as the highest frequency.
    The IR/DR scan-path tests used 1.000MHz as the final frequency.

    -----[Measure the source and frequency of the final JTAG TCLKR input]--------

    There is no hardware for measuring the JTAG TCLK frequency.

    -----[Perform the standard path-length test on the JTAG IR and DR]-----------

    This path-length test uses blocks of 512 32-bit words.

    The test for the JTAG IR instruction path-length succeeded.
    The JTAG IR instruction path-length is 38 bits.

    The test for the JTAG DR bypass path-length succeeded.
    The JTAG DR bypass path-length is 1 bits.

    -----[Perform the Integrity scan-test on the JTAG IR]------------------------

    This test will use blocks of 512 32-bit words.
    This test will be applied just once.

    Do a test using 0xFFFFFFFF.
    Scan tests: 1, skipped: 0, failed: 0
    Do a test using 0x00000000.
    Scan tests: 2, skipped: 0, failed: 0
    Do a test using 0xFE03E0E2.
    Scan tests: 3, skipped: 0, failed: 0
    Do a test using 0x01FC1F1D.
    Scan tests: 4, skipped: 0, failed: 0
    Do a test using 0x5533CCAA.
    Scan tests: 5, skipped: 0, failed: 0
    Do a test using 0xAACC3355.
    Scan tests: 6, skipped: 0, failed: 0
    All of the values were scanned correctly.

    The JTAG IR Integrity scan-test has succeeded.

    -----[Perform the Integrity scan-test on the JTAG DR]------------------------

    This test will use blocks of 512 32-bit words.
    This test will be applied just once.

    Do a test using 0xFFFFFFFF.
    Scan tests: 1, skipped: 0, failed: 0
    Do a test using 0x00000000.
    Scan tests: 2, skipped: 0, failed: 0
    Do a test using 0xFE03E0E2.
    Scan tests: 3, skipped: 0, failed: 0
    Do a test using 0x01FC1F1D.
    Scan tests: 4, skipped: 0, failed: 0
    Do a test using 0x5533CCAA.
    Scan tests: 5, skipped: 0, failed: 0
    Do a test using 0xAACC3355.
    Scan tests: 6, skipped: 0, failed: 0
    All of the values were scanned correctly.

    The JTAG DR Integrity scan-test has succeeded.

    [End: Texas Instruments XDS100v3 USB Emulator_0]

  • 上面贴了部分原理图,画在了一张纸上截图不是很清晰。大体上是按照TI的5517开发板改的。三个晶振已经起振,电压测试点也是对的。不排除焊接问题。

  • 先把TCLK频率降一下试试。

    另外,DSP_LDO_EN上拉,即LDO没有用,那么电源电路是什么样子的?

  • 感谢你的回复!

    电源芯片也是按照开发板画的,用的TPS65023。LDO用的是VDCDC3管脚输出的3.3V电压。

    TCK频率已降到100KHZ。还是同样的问题。

  • 一直没看到DSP的RESET信号是哪来的?

  • 感谢您的耐心解答。实在抱歉,第一次给的是以前的版本,后来把RESET改了,最终版是这个样子的,上拉电阻接3.3V,下面接开关接地