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项目需要，设计了一个DM6437的最小系统版，为了节约成本，板上只用了一片16位的DDR2芯片，查阅DM6437的数据手册，显示可以做16位使用，但是调了几天都没弄好，不知道要改那些寄存器？请问TI公司，有该款芯片16位DDR2访问的程序吗？
配置SDBCR的NM位，不过这个都不知道的话，估计你时序也没有配置吧，当然不可能能通。
还要根据DDR芯片手册的参数，按手册spru986里的说明对DDR时序进行计算配置。
很感谢你的回复，我通过查阅DDR2芯片手册和spru986，对DDR2频率做了重新配置，由162Mhz降到135Mhz，目前程序能下载运行，但是不知道这个配置得到的135Mhz，我该如何验证，可不可以用示波器检测？或者说，通过寄存器查看结果？另外，对16bit访问，除了改
DDR_SDBCR = 0 // DDR Bank Config | ( 0 << 23 ) // Boot unlock = No | ( 2 << 19 ) // Reserved = ( 2 ) | ( 0 << 18 ) // Drive Strength= Normal | ( 3 << 16 ) // Reserved = ( 3 ) | ( 1 << 15 ) // Modify SDBCR = Yes | (1<< 14 ) // Bus width = 16-bit | ( 4 << 9 ) // CAS latency = 4 | ( 3 << 4 ) // Bank Setup = 8 banks | ( 2 << 0 ); // Page Size = 1024-word / 10 column bits
还需要改其他的吗？非常感谢
能下载运行说明就差不多了，是否稳定就难说了，没见你有修改时序参数。
感谢你的回复!
我在配置的时候，先设置DDR2_CLK，通过以下代码设置为135Mhz
Setup_PLL2_DDR_135_MHz_OscIn( ){ /* [VPSS @54 MHz][DDR @135 MHz] w/ Onchip Oscillator */ setup_pll_2( 0, 19, 9, 1 );}
此后的时序代码控制如下：
/* ------------------------------------------------------------------------ * * * * setup_ddr2( ) * * Configure DDR2 to run at specified frequency. * * * * Using 2 x MT47H64M16 - ( 8Mb x 16 bits x 8 banks ) @ 135 MHz * * * * ------------------------------------------------------------------------ */setup_ddr2( ){ #define DDR_SDBCR *( unsigned int* )( 0x20000008 ) #define DDR_SDRCR *( unsigned int* )( 0x2000000c ) #define DDR_SDTIMR *( unsigned int* )( 0x20000010 ) #define DDR_SDTIMR2 *( unsigned int* )( 0x20000014 ) #define DDR_DDRPHYCR *( unsigned int* )( 0x200000e4 )
#define DDR_VTPIOCR *( unsigned int* )( 0x200000f0 ) #define DDR_DDRVTPR *( unsigned int* )( 0x01c42038 ) #define DDR_DDRVTPER *( unsigned int* )( 0x01c4004c )
int dummy_read; int pch_nch; int freq = 135; int refresh_rate=0;
GEL_TextOut( "Setup DDR2 (%d MHz + 32-bit bus)... ",,,,, freq );
/* * Step 1 - Setup PLL2 * Step 2 - Enable DDR2 PHY */ psc_change_state( 13, 3 );
/* * Step 3 - DDR2 Initialization */ DDR_SDBCR = 0 // DDR Bank Config | ( 0 << 23 ) // Boot unlock = No | ( 2 << 19 ) // Reserved = ( 2 ) | ( 0 << 18 ) // Drive Strength= Normal | ( 3 << 16 ) // Reserved = ( 3 ) | ( 1 << 15 ) // Modify SDBCR = Yes | ( 1 << 14 ) // Bus width = 32-bit | ( 4 << 9 ) // CAS latency = 4 | ( 3 << 4 ) // Bank Setup = 8 banks | ( 2 << 0 ); // Page Size = 1024-word / 10 column bits
DDR_DDRPHYCR = 0 // DDR PHY Control Register | ( 0x1400190 << 6 ) // Magic number | ( 0 << 5 ) // DLL release | ( 0 << 4 ) // DLL powered up | ( 4 << 0 ); // Read latency ( CAS + RT - 1 )
DDR_SDTIMR = 0 // DDR Timing Register | ( 17 << 25 ) // tRFC = ( 133.3 ns / 7.4 ns ) - 1 | ( 2 << 22 ) // tRP = ( 22 ns / 7.4 ns ) - 1 | ( 2 << 19 ) // tRCD = ( 22 ns / 7.4 ns ) - 1 | ( 1 << 16 ) // tWR = ( 15 ns / 7.4 ns ) - 1 | ( 5 << 11 ) // tRAS = ( 45 ns / 7.4 ns ) - 1 | ( 8 << 6 ) // tRC = ( 67 ns / 7.4 ns ) - 1 | ( 1 << 3 ) // tRRD = ( 10 ns / 7.4 ns ) - 1 | ( 1 << 0 ); // tWTR = ( 10 ns / 7.4 ns ) - 1
DDR_SDTIMR2 = 0 // DDR Timing Register | ( 19 << 16 ) // tXSNR= ( 143.3 ns / 7.4 ns ) - 1 | ( 199 << 8 ) // tXSRD= ( 200 - 1 ) cycles | ( 1 << 5 ) // tRTP = ( 7.5 ns / 7.4 ns ) - 1 | ( 2 << 0 ); // tCKE = ( 3 - 1 ) cycles
DDR_SDBCR = 0x00130832; // DDR Bank: cannot modify
refresh_rate = ( freq * 78 ) / 10;
DDR_SDRCR = 0 | ( 0 << 31 ) // Exits self-refresh | ( 0 << 30 ) // Disable MCLK stopping | refresh_rate; // Refresh Control = 7.8 usec * freq
/* * Step 4 - Dummy Read from DDR2 */ dummy_read = *( int* )0x80000000;
/* * Step 5 - Soft Reset ( SYNCRESET followed by ENABLE ) of DDR2 PHY */ psc_change_state( 13, 1 ); psc_change_state( 13, 3 );
/* * Step 6 - Enable VTP calibration * Step 7 - Wait for VTP calibration ( 33 VTP cycles ) */ DDR_VTPIOCR = 0x201f; DDR_VTPIOCR = 0xa01f; _wait( 1500 );
/* * Step 8 - Enable access to DDR VTP reg * Step 9 - Reat P & N channels * Step 10 - Set VTP fields PCH & NCH */ DDR_DDRVTPER = 1; pch_nch = DDR_DDRVTPR & 0x3ff; DDR_VTPIOCR = 0xa000 | pch_nch;
/* * Step 11 - Disable VTP calibaration * - Disable access to DDR VTP register */ DDR_VTPIOCR &= ~0x2000; DDR_DDRVTPER = 0;
GEL_TextOut( "[Done]\n" );}
如此，得到16bit，DDR2_CLK=135Mhz的配置，不知道是否合适？
下载调试的时候，采用的是LED闪烁程序，程序的cmd文件，将代码放在DDR2运行。实验结果正常，没出现问题，这是否说明配置成功？
dan li1 说： DDR_DDRPHYCR = 0 // DDR PHY Control Register | ( 0x1400190 << 6 ) // Magic number | ( 0 << 5 ) // DLL release | ( 0 << 4 ) // DLL powered up | ( 4 << 0 ); // Read latency ( CAS + RT - 1 ) DDR_SDTIMR = 0 // DDR Timing Register | ( 17 << 25 ) // tRFC = ( 133.3 ns / 7.4 ns ) - 1 | ( 2 << 22 ) // tRP = ( 22 ns / 7.4 ns ) - 1 | ( 2 << 19 ) // tRCD = ( 22 ns / 7.4 ns ) - 1 | ( 1 << 16 ) // tWR = ( 15 ns / 7.4 ns ) - 1 | ( 5 << 11 ) // tRAS = ( 45 ns / 7.4 ns ) - 1 | ( 8 << 6 ) // tRC = ( 67 ns / 7.4 ns ) - 1 | ( 1 << 3 ) // tRRD = ( 10 ns / 7.4 ns ) - 1 | ( 1 << 0 ); // tWTR = ( 10 ns / 7.4 ns ) - 1 DDR_SDTIMR2 = 0 // DDR Timing Register | ( 19 << 16 ) // tXSNR= ( 143.3 ns / 7.4 ns ) - 1 | ( 199 << 8 ) // tXSRD= ( 200 - 1 ) cycles | ( 1 << 5 ) // tRTP = ( 7.5 ns / 7.4 ns ) - 1 | ( 2 << 0 ); // tCKE = ( 3 - 1 ) cycles
这几个参数要对照你采用的DDR芯片的手册里的数据比较一下，确保稳定。
