1. www.ti.com.cn/.../spruhj4.pdf中2-13提到
The GIC-400 has a configuration register that allows software to configure each interrupt line to be level-sensitive or edge-sensitive. Because the hardware assumes all shared peripheral interrupts to be pulses, it is the software’s responsibility to ensure that the GICD_ICFGR bits are set up correctly after reset. For more information about the GICD-ICFGR register, see the ARM Generic Interrupt Controller architecture document
请问ARM Generic Interrupt Controller这个文档在哪里可以下载
2. 6630开发板的上的ARM核上有的一些测试应用程序，相应的源代码在哪里可以下载？
