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使用C6678例程中IPC核间中断,改为C6657 ipc核间中断时出现错误。

使用C6678例程中IPC中断,改为C6657 ipc中断时出现错误。代码如下:错误现象是:

打印输出为:

[TMS320C66x_0] Set interrupt from Core 0 to Core 1, cycle = 15268
[TMS320C66x_1] CORE1 test passed!
[TMS320C66x_0] Interrupt Info 16

正常还应有以下代码中红色部分,但是没有。从现象看是应该core1没有接收到core0的中断。

求帮忙解答,十分感谢!!!!!

TMS320C66x_1] CORE1 test passed!

int32_t intcInit()

{

    /* INTC module initialization */

    context.eventhandlerRecord = Record;

    context.numEvtEntries      = CSL_INTC_EVENTID_CNT;

    if (CSL_intcInit (&context) != CSL_SOK)

        return -1;

 

    /* Enable NMIs */

    if (CSL_intcGlobalNmiEnable () != CSL_SOK)

        return -1;

 

    /* Enable global interrupts */

    if (CSL_intcGlobalEnable (&state) != CSL_SOK)

        return -1;

 

    /* INTC has been initialized successfully. */

    return 0;

}

 

int32_t registerInterrupt()

{

   uint32_t i;

   uint32_t event;

   uint32_t vector;

   uint32_t core;

   uint32_t coreID = CSL_chipReadReg (CSL_CHIP_DNUM);

   CSL_IntcEventHandler isr;

 

   for (i=0; i<MAX_CORE_NUM; i++)

   {

      coreVector[i] = 0;

   }

 

   for (i=0; i<MAX_SYSTEM_VECTOR; i++)

   {

      core   = intInfo[i].core;

      if (coreID == core)

      {

        event  = intInfo[i].event;

        vector = intInfo[i].vect;

        isr    = intInfo[i].isr;

 

        if (MAX_CORE_VECTOR <= coreVector[core])

        {

           printf("Core %d Vector Number Exceed\n");

        }

 

            hintc[vector] = CSL_intcOpen (&intcObj[vector], event, (CSL_IntcParam*)&vector , NULL);

          if (hintc[vector] == NULL)

          {

              printf("Error: GEM-INTC Open failed\n");

              return -1;

          }

 

          /* Register an call-back handler which is invoked when the event occurs. */

          EventRecord.handler = isr;

          EventRecord.arg = 0;

          if (CSL_intcPlugEventHandler(hintc[vector],&EventRecord) != CSL_SOK)

          {

              printf("Error: GEM-INTC Plug event handler failed\n");

              return -1;

          }

 

        /* clear the events. */

          if (CSL_intcHwControl(hintc[vector],CSL_INTC_CMD_EVTCLEAR, NULL) != CSL_SOK)

          {

              printf("Error: GEM-INTC CSL_INTC_CMD_EVTCLEAR command failed\n");

              return -1;

          }

 

        /* Enabling the events. */

          if (CSL_intcHwControl(hintc[vector],CSL_INTC_CMD_EVTENABLE, NULL) != CSL_SOK)

          {

              printf("Error: GEM-INTC CSL_INTC_CMD_EVTENABLE command failed\n");

              return -1;

          }

        coreVector[core]++;

      }

   }

 

    return 0;

}

// BOOT and CONFIG dsp system modules Definitions

#define CHIP_LEVEL_REG  0x02620000

// Boot cfg registers

#define KICK0      *(unsigned int*)(CHIP_LEVEL_REG + 0x0038)

#define KICK1      *(unsigned int*)(CHIP_LEVEL_REG + 0x003C)

#define KICK0_UNLOCK (0x83E70B13)

#define KICK1_UNLOCK (0x95A4F1E0)

#define KICK_LOCK    0

 

void IssueInterruptToNextCore()

{

   uint32_t CoreNum;

   uint32_t iNextCore;

   static uint32_t interruptInfo=0;

 

   CoreNum = CSL_chipReadReg (CSL_CHIP_DNUM);

 

   iNextCore = (CoreNum + 1)%2; //

 

   printf("Set interrupt from Core %x to Core %d, cycle = %d\n", CoreNum, iNextCore, TSCL);

 

   interruptInfo +=16;

 

   // Unlock Config

   KICK0 = KICK0_UNLOCK;

   KICK1 = KICK1_UNLOCK;

 

   *(volatile uint32_t *) iIPCGRInfo[iNextCore] = interruptInfo;

 

   *(volatile uint32_t *) iIPCGRInfo[iNextCore] |= 1;

   // lock Config

   KICK0 = KICK_LOCK;

   KICK1 = KICK_LOCK;

   printf("Interrupt Info %d\n", interruptInfo);

 

}

 

/**

 *  @b Description

 *  @n

 *      IPC interrupt service routine

 *

 *

 *  @retval

 *      Setup corresponding flags based on SRC of IPCGR

 */

void IPC_ISR()

{

   volatile uint32_t read_ipcgr;

    uint32_t CoreNum;

    uint32_t iPrevCore;

    CoreNum = CSL_chipReadReg (CSL_CHIP_DNUM);;

 

    iPrevCore = (CoreNum - 1)%2;

 

    read_ipcgr = *(volatile Uint32 *) iIPCGRInfo[CoreNum];

 

    *(volatile uint32_t *) iIPCARInfo[CoreNum] = read_ipcgr; //clear the related source info

 

    printf("Receive interrupt from Core %d with info 0x%x, cycle = %d\n", iPrevCore, read_ipcgr, TSCL);

 

    interruptNumber++;

 

    if(CoreNum!=0)//

    {

      IssueInterruptToNextCore();

    }

    else

    {

      printf("IPC test passed!\n");

    }

}