问题是这样的:利用mcbsp将DM642配置成SPI协议的从机,主机用FPGA实现。现在主机端发送出来的数据和波形用示波器和逻辑分析仪看都是正常的,但是在DSP端就是无法正确接收。主机FPGA发送的数据格式是:帧头(AA)+8字节数据。DSP首先检测帧头AA是否正确,如果正确,则接收8字节数据,否则不接收。
下图是FPGA端发送出来的波形图,
采用的模式是CLKSTP=11,CLKXP=1这种模式,DM642芯片手册上的时序图如下所示,
下面是我的DSP端的配置:
static MCBSP_Config myConfig =
{
MCBSP_SPCR_RMK //Serial Port Control Register (SPCR)
(
MCBSP_SPCR_FREE_YES, // Serial clock free running mode(FREE)
MCBSP_SPCR_SOFT_YES, // Serial clock emulation mode(SOFT)
MCBSP_SPCR_FRST_YES, // Frame sync generator reset(FRST)
MCBSP_SPCR_GRST_YES, // Sample rate generator reset(GRST)
MCBSP_SPCR_XINTM_XRDY, // Transmit interrupt mode(XINTM)
MCBSP_SPCR_XSYNCERR_NO, // Transmit synchronization error
MCBSP_SPCR_XRST_YES, // Transmitter reset(XRST)
MCBSP_SPCR_DLB_OFF, // Digital loopback(DLB) mode
MCBSP_SPCR_RJUST_RZF, // Receive data sign-extension and
// justification mode(RJUST)
MCBSP_SPCR_CLKSTP_DEFAULT, // Clock stop(CLKSTP) mode 0
MCBSP_SPCR_DXENA_OFF, // DX Enabler(DXENA) -Extra delay for
// DX turn-on time.
MCBSP_SPCR_RINTM_RRDY, // Receive interrupt(RINT) mode
MCBSP_SPCR_RSYNCERR_NO, // Receive synchronization error(RSYNCERR)
MCBSP_SPCR_RRST_YES // Receiver reset(RRST)
),
MCBSP_RCR_RMK // Receive Control Register (RCR)
(
MCBSP_RCR_RPHASE_SINGLE, // Receive phases
MCBSP_RCR_RFRLEN2_OF(0), // Receive frame length
// in phase 2(RFRLEN2)
MCBSP_RCR_RWDLEN2_8BIT, // Receive element length
// in phase 2(RWDLEN2)
MCBSP_RCR_RCOMPAND_MSB, // Receive companding mode (RCOMPAND)
MCBSP_RCR_RFIG_YES, // Receive frame ignore(RFIG)
MCBSP_RCR_RDATDLY_0BIT, // Receive data delay(RDATDLY)
MCBSP_RCR_RFRLEN1_OF(0), // Receive frame length
// in phase 1(RFRLEN1)
MCBSP_RCR_RWDLEN1_8BIT, // Receive element length
// in phase 1(RWDLEN1)
MCBSP_RCR_RWDREVRS_DISABLE // Receive 32-bit bit reversal
// feature.(RWDREVRS)
),
MCBSP_XCR_RMK //Transmit Control Register (XCR)
(
MCBSP_XCR_XPHASE_SINGLE, // Transmit phases
MCBSP_XCR_XFRLEN2_OF(0), // Transmit frame length
// in phase 2(XFRLEN2)
MCBSP_XCR_XWDLEN2_8BIT, // Transmit element length
// in phase 2
MCBSP_XCR_XCOMPAND_MSB, // Transmit companding mode(XCOMPAND)
MCBSP_XCR_XFIG_YES, // Transmit frame ignore(XFIG)
MCBSP_XCR_XDATDLY_0BIT, // Transmit data delay(XDATDLY)
MCBSP_XCR_XFRLEN1_OF(0), // Transmit frame length
// in phase 1(XFRLEN1)
MCBSP_XCR_XWDLEN1_8BIT, // Transmit element length
// in phase 1(XWDLEN1)
MCBSP_XCR_XWDREVRS_DISABLE // Transmit 32-bit bit reversal feature
),
MCBSP_SRGR_RMK //serial port sample rate generator register(SRGR)
(
MCBSP_SRGR_GSYNC_FREE, // Sample rate generator clock
// synchronization(GSYNC).
MCBSP_SRGR_CLKSP_RISING, // CLKS polarity clock edge select(CLKSP)
MCBSP_SRGR_CLKSM_INTERNAL, // MCBSP sample rate generator clock
// mode(CLKSM)
MCBSP_SRGR_FSGM_DXR2XSR, // Sample rate generator transmit frame
// synchronization
MCBSP_SRGR_FPER_OF(8), // Frame period(FPER)
MCBSP_SRGR_FWID_OF(0), // Frame width(FWID)
MCBSP_SRGR_CLKGDV_OF(1) // Sample rate generator clock
// divider(CLKGDV)
),
MCBSP_MCR_DEFAULT, // Using default value of MCR register
MCBSP_RCERE0_DEFAULT, // Using default value of RCERE registers
MCBSP_RCERE1_DEFAULT,
MCBSP_RCERE2_DEFAULT,
MCBSP_RCERE3_DEFAULT,
MCBSP_XCERE0_DEFAULT, // Using default value of XCERE registers
MCBSP_XCERE1_DEFAULT,
MCBSP_XCERE2_DEFAULT,
MCBSP_XCERE3_DEFAULT,
MCBSP_PCR_RMK //serial port pin control register(PCR)
(
MCBSP_PCR_XIOEN_SP, // Transmitter in general-purpose I/O mode
MCBSP_PCR_RIOEN_SP, // Receiver in general-purpose I/O mode
MCBSP_PCR_FSXM_EXTERNAL, // Transmit frame synchronization mode
MCBSP_PCR_FSRM_EXTERNAL, // Receive frame synchronization mode
MCBSP_PCR_CLKXM_INPUT, // Transmitter clock mode (CLKXM)
MCBSP_PCR_CLKRM_INPUT, // Receiver clock mode (CLKRM)
MCBSP_PCR_CLKSSTAT_0, // CLKS pin status(CLKSSTAT)
MCBSP_PCR_DXSTAT_0, // DX pin status(DXSTAT)
MCBSP_PCR_FSXP_ACTIVELOW, // Transmit frame synchronization polarity(FSXP)
MCBSP_PCR_FSRP_ACTIVELOW, // Receive frame synchronization polarity(FSRP)
MCBSP_PCR_CLKXP_FALLING, // Transmit clock polarity(CLKXP)Transmit data sampled on falling edge of CLKX
MCBSP_PCR_CLKRP_FALLING // Receive clock polarity(CLKRP)
)
// MCBSP_enableSrgr(hMcbsp); // 修改时我加上的!!!
};
求各位老师指点哪来有问题,谢谢!