DM8168 vou1(HDMI)输出bt656 隔行PAL问题

user3906396

首先，通过修改MCfw中HDMI（VOUT1）相关分辨率到SYS_STD_PAL，
然后，修改了VPPS系统中gSystem_dctrl的显示配置，
最后修改了在
vpshal_hdvenc.c中增加{{FVID2_STD_PAL, 720, 576, FVID2_SF_INTERLACED, 27000, 30, 12, 68, 64, 2, 19, 3}, 4, 4, 4},时序，
但是，实测，BT656 通过ADV7390后接屏，只有几秒钟有图像，而且图像不对，几秒后没有图像成蓝屏，
请问，我在vpshal_hdvenc.c中增加{{FVID2_STD_PAL, 720, 576, FVID2_SF_INTERLACED, 27000, 30, 12, 68, 64, 2, 19, 3}, 4, 4, 4},时序对吗？
DM8168对于Vout1 输出bt656隔行视频标准时序是什么，有没有Vout1输出BT656的例子，
该问题如何定位，请大家帮忙

6 年多前

0 user3906396 6 年多前

Prodigy 191 points

该问题有了进展了,如下图

0 user3906396 6 年多前回复 user3906396

Prodigy 191 points

请各位前辈高人指点，上图中只有一部分图像胡原因，主要的显示代码如下，谢谢大家。

（1）app部分主要代码
for(i=0; i<1; i++)
{
swMsPrm[i].inQueParams.prevLinkId = SYSTEM_VPSS_LINK_ID_DUP_0;
swMsPrm[i].inQueParams.prevLinkQueId = 1;
swMsPrm[i].outQueParams.nextLink = gVdisModuleContext.displayId[0];
swMsPrm[i].maxInputQueLen = SYSTEM_SW_MS_DEFAULT_INPUT_QUE_LEN;
swMsPrm[i].maxOutRes = VSYS_STD_PAL;
swMsPrm[i].initOutRes = VSYS_STD_PAL;
swMsPrm[i].lineSkipMode = FALSE;
swMsPrm[i].enableLayoutGridDraw = FALSE;
swMsPrm[i].numOutBuf = 4;
swMsPrm[i].enableProcessTieWithDisplay = TRUE;
swMsPrm[i].outDataFormat = SYSTEM_DF_YUV422I_YUYV;
swMsPrm[i].outputBufModified = TRUE;
MultiCh_swMsGetDefaultLayoutPrm_k1774_PAL(0, &swMsPrm[i], FALSE); /* Since only live preview is there, show it on both displays */
}

DisplayLink_CreateParams prm_dis;
MULTICH_INIT_STRUCT(DisplayLink_CreateParams, prm_dis);
prm_dis.inQueParams[0].prevLinkId = gVdisModuleContext.swMsId[0];
prm_dis.inQueParams[0].prevLinkQueId = 0;
prm_dis.displayRes = VSYS_STD_PAL;

（2）mcfw

ti_vdis.c

pContext->deviceParams[VDIS_DEV_HDMI].enable = TRUE;
pContext->deviceParams[VDIS_DEV_HDMI].outputInfo.vencNodeNum = VDIS_VENC_HDMI;
pContext->deviceParams[VDIS_DEV_HDMI].outputInfo.aFmt = VDIS_A_OUTPUT_COMPOSITE;
pContext->deviceParams[VDIS_DEV_HDMI].outputInfo.dvoFmt = VDIS_DVOFMT_SINGLECHAN;
pContext->deviceParams[VDIS_DEV_HDMI].outputInfo.dataFormat = SYSTEM_DF_YUV422SP_UV;

system_dctrl.c

Vps_DcConfig gSystem_dctrlTriDisplayConfigDvo2 = {
VPS_DC_USERSETTINGS, /* Use Case */
/* Edge information */
{
{VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX} ,
{VPS_DC_VCOMP_MUX, VPS_DC_VCOMP} ,
{VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND} ,
{VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX} ,
{VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT} ,
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND} ,
{VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDCOMP_BLEND} ,
{VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX} ,
{VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND} ,
{VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND} ,
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_HDCOMP_BLEND} ,
{VPS_DC_GRPX1_INPUT_PATH, VPS_DC_DVO2_BLEND},
{VPS_DC_GRPX2_INPUT_PATH, VPS_DC_HDMI_BLEND}
}
,
13,
/* VENC information */
{
/* Mode information */
{
{VPS_DC_VENC_HDMI, {FVID2_STD_PAL}
}
,
{VPS_DC_VENC_HDCOMP, {FVID2_STD_1080P_60}
}
,
{VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}
}
,
{VPS_DC_VENC_SD, {FVID2_STD_NTSC}
}
}
,
(VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDCOMP), /* Tied VENC bit
* mask */
4u /* Number of VENCs
*/
}
};

（3）hdvpss
vpshal_hdvenc.c
{{FVID2_STD_PAL, 1442, 576, FVID2_SF_INTERLACED, 27000, 25,
12, 140, 64, 2, 19, 3}, 4, 4, 4},

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DM8168 vou1(HDMI)输出bt656 隔行PAL问题