OMAP L138 arm boot dsp问题，arm访问不了DSP L2的ram？

sum liu

Intellectual 621 points

我的启动过程是把DSP.out 转成boot table的并文件，使用hex6x来转换的 -boot选项

然后在arm上再以boot table的方式把对应的data搬到对应的dest，搬移以后对dsp进行reset 和wakeup。

但是发现dsp 没有起来，我dsp的程序是在L2 ram上运行的，入口地址是0x0080000，我试着再把L2 ram上的代码出来，就发现读出来的全是0.

但是我查了l138的手册，上面说明的是arm可以访问DSP的这块ram的，请教下是怎么回事呢？

9 年多前

0 sum liu 9 年多前

Intellectual 621 points

//
unsigned int entry_point = 0;
unsigned int SectionLenth =0;
unsigned int SectionAddress;
unsigned int * p_SectionAddress;
unsigned int data;
int i;
//Entry point of DSP .out
printf("Loading DSP .bin \n");
//move code to ram
//get entry point
fread((&entry_point), 4, 1, fPtr);
    //
fread((&SectionLenth), 4, 1, fPtr);
    do
    {
    fread((&SectionAddress), 4, 1, fPtr);
    p_SectionAddress = (unsigned int * )SectionAddress;
    for(i=0;i<(SectionLenth/4);i++)
    {
      fread((&data), 4, 1, fPtr);
      * p_SectionAddress = data;
      p_SectionAddress++;
    }
    fread((&SectionLenth), 4,1, fPtr);
    }while(SectionLenth != 0x0);
    //校验一次，读取再和文件对比一下
    //*(unsigned int *)0x80000000 = 0x12345678;
    //data = *(unsigned int *)0x80000000;
    //
KICK0Ra = 0x83e70b13; //Open Permissions to SYSCFG Registers
KICK1Ra = 0x95A4F1E0; //(Not required for PG2.0 silicon and above)
//Set DSP boot address vector to entry point of DSP program. This must be aligned to 1KB boundaries
HOST1CFG = entry_point;
//Wake up the DSP
//set PSC0.MDCTL15 to to enable the clocks and all transitioning from the SwRstDisable state to Enable state
CSL_PSC_0_MDCTL_15 = (((CSL_PSC_0_MDCTL_15) & (~ (0x0000001Fu))) | 0x03u);
//set (PSC0.PTCMD) to start the state transition sequence for the DSP module
CSL_PSC_0_PTCMD = (((CSL_PSC_0_PTCMD) & ( ~0x00000002u)) | 0x20u );
//Check GOSTAT[1] bit in (PSC0.PTSTAT) for power transition sequence completion
while((((CSL_PSC_0_PTSTART) & 0x00000002u) >> 1) == 1);
//Wait for the STATE bit in (PSC0.MDSTAT15) to change to 3h.
while( ((CSL_PSC_0_MDSTAT_15) & 0x3F) != 0x3u );
//Write a 1 to the LRST bit in PSC0.MDCTL15 to release the DSP local reset
CSL_PSC_0_MDCTL_15 = ((CSL_PSC_0_MDCTL_15) | 0x00000100u);

0 sum liu 9 年多前回复 sum liu

Intellectual 621 points

//DSP wake
#define SYS_BASE            0x01C14000
#define KICK0Ra             *(unsigned int*)(SYS_BASE + 0x038)
#define KICK1Ra             *(unsigned int*)(SYS_BASE + 0x03c)
#define HOST1CFG            *(unsigned int*)(SYS_BASE + 0x044)
/** @brief Base address of PSC memory mapped registers                        */
#define CSL_PSC_0_BASE                      (0x01C10000u)
#define CSL_PSC_0_MDCTL_15                  *( volatile Uint32* )( CSL_PSC_0_BASE + 0x0A3C )
#define CSL_PSC_0_PTCMD                     *( volatile Uint32* )( CSL_PSC_0_BASE + 0x0120 )
#define CSL_PSC_0_PTSTART                 *( volatile Uint32* )( CSL_PSC_0_BASE + 0x0128 )
#define CSL_PSC_0_MDSTAT_15                 *( volatile Uint32* )( CSL_PSC_0_BASE + 0x083c)
//

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OMAP L138 arm boot dsp问题，arm访问不了DSP L2的ram？