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The PGA450-Q1 can also be put into a RESET state where the microcontroller is not active. During this state, SPI is the only digital interface that can be used. The low-side drivers can still be triggered to begin an ultrasonic burst and the analog front-end and digital data path can still store the returned echo signal in the FIFO RAM. However, any processing of the FIFO RAM by the internal microprocessor to determine the location of an object does not occur. The FIFO RAM data can be read over SPI, allowing an external microprocessor to process the data. While the microcontroller is active, the MICRO RESET test register is the only register accessible through SPI. The device must be put into the RESET state before sending additional SPI commands. The maximum current (VREG not charging) in the RESET state is 15 mA. To put the microcontroller in reset, write a 1 to bit 0 of the MICRO RESET test register. To bring the microcontroller out of reset, write a 0 to bit 0 of the MICRO RESET test register 这里描述的MICRO RESET test register这个寄存器的地址是什么，在手册中没有找到
