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MSP430F 6723 外部晶振 32K 不起振的原因

Other Parts Discussed in Thread: MSP430F6723

各位,请教一下 MSP430F 6723  外部晶振 32K 不起振的原因? 

我下载了DCO 实验程序 ,LED灯可以闪烁,证明MSP430F6723是可以工作的。(MSP430F673X_TA0_02.c              Timer0_A0, Toggle P1.0, CCR0 Up Mode ISR, DCO SMCLK)

但是下载 (MSP430F673X_TA0_04.c       //       Timer0_A0, Toggle P1.0, Overflow ISR, 32kHz ACLK )   仿真时一直在    do
    {
        UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
        // Clear XT2,XT1,DCO fault flags
        SFRIFG1 &= ~OFIFG;                   // Clear fault flags
    } while (SFRIFG1 & OFIFG);               // Test oscillator fault flag

循环,跑不出来, 晶振一直不起振,

请问一下接32K 晶振时要注意哪些问题吗?(我的硬件电路接21引脚和22引脚直接接32K的晶振没有加其它的东西)

盼复!

  • 你好!

    试试在无源晶体振荡器两个引脚上增加22pF的负载电容。

  • 你好,刚才试过了,也是没有输出功能! 软件上是否要设置其它的东西,官方例程测试可以的吗?如下:

    #include <msp430.h>

    void main(void)
    {
        WDTCTL = WDTPW | WDTHOLD;                // Stop WDT

        // Setup P1.0 output
        P3DIR |= BIT7;                           // Set P1.0 to output direction
        P3OUT &= ~BIT7;                          // Clear P1.0

        // Setup LFXT1
        UCSCTL6 &= ~(XT1OFF);                    // XT1 On
        UCSCTL6 |= XCAP_3;                       // Internal load cap
      
        // Loop until XT1 fault flag is cleared
        do
        {
            UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
            // Clear XT2,XT1,DCO fault flags
            SFRIFG1 &= ~OFIFG;                   // Clear fault flags
           
        } while (SFRIFG1 & OFIFG);               // Test oscillator fault flag

        // Setup TA0
        TA0CTL = TASSEL_1 | MC_2 | TACLR | TAIE; // ACLK, cont. mode, clear TAR
                                                 // Enable interrupt

        __bis_SR_register(LPM3_bits | GIE);      // Enter LPM3, enable interrupts
        __no_operation();                        // For debugger
    }

    // Timer0_A1 Interrupt Vector (TAIV) handler
    #pragma vector=TIMER0_A1_VECTOR
    __interrupt void TIMER0_A1_ISR(void)
    {
        switch (__even_in_range(TA0IV, 14))
        {
            case  TA0IV_NONE: break;             // No interrupt
            case  TA0IV_TA0CCR1: break;          // TA0CCR1_CCIFG
            case  TA0IV_TA0CCR2: break;          // TA0CCR2_CCIFG
            case  6: break;                      // Reserved
            case  8: break;                      // Reserved
            case 10: break;                      // Reserved
            case 12: break;                      // Reserved
            case TA0IV_TA0IFG:                   // TA0IFG
                P3OUT ^= BIT7;                   // Toggle P1.0
                break;
            default: break;
        }
    }

    求解,已经调试几天了,却没有进展!

    感谢!

  • 楼主试试这个例程MSP430F673X_UCS_6,用示波器看看是否有32.768khz稳定方波输出。

  • 这个实验的时钟使用情况如下:

    ACLK = XT1 = 32768Hz, MCLK = SMCLK = default DCO ~1.045MHz

    所以MCU Core用的还是内部DCO,下面的代码是我从MSP430F673X_TA0_04.c 中copy的一部分:

    // Setup LFXT1
    UCSCTL6 &= ~(XT1OFF); // XT1 On
    UCSCTL6 |= XCAP_3; // Internal load cap

    // Loop until XT1 fault flag is cleared
    do
    {
    UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
    // Clear XT2,XT1,DCO fault flags
    SFRIFG1 &= ~OFIFG; // Clear fault flags
    } while (SFRIFG1 & OFIFG); // Test oscillator fault flag

    从这里可以看出,只是对XT2,XT1,DCO fault flags 进行了清除操作,Clear fault flags,然后再次查询oscillator fault flag,如果死循环到这里,说明外部XTAL1没有正常工作;

    1. 请调整UCSCTL6 |= XCAP_3; // Internal load cap 到不同的值来测试,安装下面的说明;

    XCAP Bits 3-2 Oscillator capacitor selection. These bits select the capacitors applied to the LF crystal or resonator in the LF
    mode (XTS = 0). The effective capacitance (seen by the crystal) is C eff ≉ (C XIN + 2 pF)/2. It is assumed that
    C XIN = C XOUT and that a parasitic capacitance of 2 pF is added by the package and the printed circuit board. For
    details about the typical internal and the effective capacitors, refer to the device-specific data sheet.

    2.请按照datasheet上的数据来选择32768晶体,或者外加合适的电容;

  • 遇到同样的问题,

        {
            UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
            // Clear XT2,XT1,DCO fault flags
            SFRIFG1 &= ~OFIFG;                   // Clear fault flags
        } while (SFRIFG1 & OFIFG);               // Test oscillator fault flag

    清除OFIFG应该加一段延时,因为震荡失败标志需要500-1000ms才起作用。加了延时后确认了晶振不振,在这里死循环了。