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msp430f5529 SPI 主机 四线模式问题?

Other Parts Discussed in Thread: MSP430F5529

void Init_SPI()

 {   P4SEL |=BIT5+BIT4+BIT3+BIT0;                          // SPI 主机 四线模式

  UCA1CTL1 |= UCSWRST;                                  // 复位

   UCA1CTL0 |= UCMST+UCSYNC+UCMODE_1+UCCKPH+UCMSB;       //上升沿发送数据,MSB,四线主机,同步

  UCA1CTL1 |= UCSSEL_2;                                 // SMCLK

   UCA1BR0 =100;               

UCA1BR1 = 0;                           

UCA1CTL1 &= ~UCSWRST;                                 // **Initialize USCI state machine**  

 while (!(UCA1IFG&UCTXIFG));                             // USCI_A0 TX buffer ready?

  UCA1TXBUF =data_FPGA_H;   while (!(UCA1IFG&UCTXIFG));                             // USCI_A0 TX buffer ready?  

 UCA1TXBUF =data_FPGA_L;

 }

问题是:为什么SET端在发送数据不能置高,在发送结束后自动拉低?我选择的是四线主机模式,当SET为高时从机接受数据,但是现在不知道哪里出问题,数据可以发出来,但是SET不能自动置高?希望TI的工程师帮忙解答哈?谢谢了

  • 有没有接从机,是不是被从机拉低了。

  • baolin jiao,

    你应该使用了port mapping 的功能,这部分功能检测过没有?

  • 没有接从机,只是单独检测主机的输出。

  • PORT MAPPING 不太懂,希望你能详细说明下吗?

  • 把程序移植到5438A上。

    只把程序的引脚重新定义了,其他没有变。

    P3SEL|=BIT6;   P5SEL |=BIT5+BIT6+BIT7;                                // SPI 主机 四线模式

    也是同样问题,STE不能自动置位?5438A 好像没有port mapping功能

  • 帖子没有人人理了?貌似要沉....................................................

  • 程序缺少IO端口映射配置

    如果5438A也有这样的问题,我明天先拿板子测下

  • 具体请参照MSP430F5529 datasheet 和user guide中 "Port Mapping Controller"部分,和code example中的例程。O(∩_∩)O~

  •   P3SEL|=BIT6;

      P5SEL |=BIT5+BIT6+BIT7;                                // SPI 主机 四线模式

      P5DIR|=BIT5;   UCA1CTL1 |= UCSWRST;                                  // 复位

      UCA1CTL0 |= UCMST+UCSYNC+UCMODE_1+UCCKPH+UCMSB;       //上升沿发送数据,MSB,四线主机,同步

       UCA1CTL1 |= UCSSEL_2;                                 // SMCLK

      UCA1BR0 =100;                       

          UCA1BR1 = 0;                       

             UCA1CTL1 &= ~UCSWRST;                                 // **Initialize USCI state machine**

      while (!(UCA1IFG&UCTXIFG));                             // USCI_A0 TX buffer ready?

       UCA1TXBUF =data_FPGA_H;

      while (!(UCA1IFG&UCTXIFG));                             // USCI_A0 TX buffer ready?  

     UCA1TXBUF =data_FPGA_L; }

     void TA_Inint()

     {   TBCTL=TASSEL_2+ID_0+MC_1+TACLR;

       TBCCTL0=CCIE;

      TBCCR0=10000;  

     _EINT();

    }

     #pragma vector=TIMER0_B0_VECTOR

    __interrupt void TIMER0_A1_T0(void)

    {   while (!(UCA1IFG&UCTXIFG));            // USCI_A0 TX buffer ready?

     UCA1TXBUF =data_FPGA_H;

     while (!(UCA1IFG&UCTXIFG));             // USCI_A0 TX buffer ready?

     UCA1TXBUF =data_FPGA_L;

    }这是5438A的程序同样的问题,希望你能帮忙解决哈,谢谢了。

    }

  • void Port_Mapping(void) {

       __disable_interrupt();                    // Disable Interrupts before altering Port Mapping registers

       PMAPPWD = 0x02D52;                        // Enable Write-access to modify port mapping registers  

       #ifdef PORT_MAP_RECFG                   

        PMAPCTL = PMAPRECFG;                      // Allow reconfiguration during runtime

       #endif   

       P4MAP0 =PM_UCA1CLK;

      P4MAP3 =PM_UCA1STE;

      P4MAP4 =PM_UCA1SIMO;

      P4MAP5 =PM_UCA1SOMI;  

       PMAPPWD = 0;                              // Disable Write-Access to modify port mapping registers

      #ifdef

     PORT_MAP_EINT

      __enable_interrupt();                     // Re-enable all interrupts

      #endif

      } 加了这一段程序后,问题依然存在。

  • 虽然过去好多年了,但是我还是遇到了这个问题,请问怎么解决的?