本身从事硬件工作,最近心血来潮,用我手上的MSP-EXP430FR5969学习UART,接下来会发布SPI,I2C的文档。纯属分享学习经历,有什么错误请大家积极指出。参考文档的下载链接我一并给出,图片好像显示不出来,我把PDF版本一起放进来,直接导出来的,没有排版,大家别介意。
www.ti.com.cn/.../zhcsch3e.pdf
www.ti.com.cn/.../slau367n.pdf
下面开始:
The digital I/O are configured with user software. The setup and operation of the digital I/O are discussed
in the following sections.
12.2.1 Input Registers (PxIN)
Each bit in each PxIN register reflects the value of the input signal at the corresponding I/O pin when the
pin is configured as I/O function. These registers are read only.
• Bit = 0: Input is low
• Bit = 1: Input is high
NOTE: Writing to read-only registers PxIN
Writing to these read-only registers results in increased current consumption while the write
attempt is active.
12.2.2 Output Registers (PxOUT)
Each bit in each PxOUT register is the value to be output on the corresponding I/O pin when the pin is
configured as I/O function, output direction.
• Bit = 0: Output is low
• Bit = 1: Output is high
If the pin is configured as I/O function, input direction and the pullup or pulldown resistor are enabled; the
corresponding bit in the PxOUT register selects pullup or pulldown.
• Bit = 0: Pin is pulled down
• Bit = 1: Pin is pulled up
12.2.3 Direction Registers (PxDIR)
Each bit in each PxDIR register selects the direction of the corresponding I/O pin, regardless of the
selected function for the pin. PxDIR bits for I/O pins that are selected for other functions must be set as
required by the other function.
• Bit = 0: Port pin is switched to input direction
• Bit = 1: Port pin is switched to output direction
12.2.4 Pullup or Pulldown Resistor Enable Registers (PxREN)
Each bit in each PxREN register enables or disables the pullup or pulldown resistor of the corresponding
I/O pin. The corresponding bit in the PxOUT register selects if the pin contains a pullup or pulldown.
• Bit = 0: Pullup or pulldown resistor disabled
• Bit = 1: Pullup or pulldown resistor enabled
Table 12-1 summarizes the use of PxDIR, PxREN, and PxOUT for proper I/O configuration.
Table 12-1. I/O Configuration
CSCTL0_H = CSKEY >> 8; // Unlock CS registers
#pragma vector = USCI_A0_VECTOR __interrupt void USCI_A0_ISR(void) {
switch(__even_in_range(UCA0IV,18)) {
case 0x00: // Vector 0: No interrupts
break;
case 0x02: ... // Vector 2: UCRXIFG
break;
case 0x04: ... // Vector 4: UCTXIFG
break;
case 0x06: ... // Vector 6: UCSTTIFG
break;
case 0x08: ... // Vector 8: UCTXCPTIFG
break;
default: break;
}
}
其中,__even_in_range(UCA0IV,18)的解释: