It will be used in PCIe 5.0 CLOCK design, which can meet PCIE 5.0 delay time (what's the delay time in the 1:2 or 2:1 design?) and phase jitter needs?
It will be used in PCIe 5.0 CLOCK design, which can meet PCIE 5.0 delay time (what's the delay time in the 1:2 or 2:1 design?) and phase jitter needs?
Hi,
No, TI has answered before, please refer to link below.
You can consider this chip
Hi VIVIAN:
we only used PCIE 5.0 CLK, not TX or RX data. TMUXHS4212 not support??
Hi
We recommend that you follow the suggestions above.
PCI CLK only 100MHz, not PCIE data 32Gbps.
Is your suggestion above, all right?
H
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