Other Parts Discussed in Thread: C2000WARE, SYSCONFIG
1.我按照clb user guide 进行设置了，目前出现了以下问题，目前别的文件生成都正常，但是没有vcd文件，同时也没有simulation文件夹
2.编译的结果是
"C:\\ti\\ccs1240\\ccs\\utils\\bin\\gmake" -k -j 16 clean -O
DEL /F "syscfg\board.h" "syscfg\board.cmd.genlibs" "syscfg\pinmux.csv" "syscfg\epwm.dot" "syscfg\clb_config.h" "syscfg\clb.dot" "syscfg\clb_simulation.bat" "syscfg\c2000ware_libraries.cmd.genlibs" "syscfg\c2000ware_libraries.h" "syscfg\clocktree.h" "syscfg\board.c" "syscfg\board.opt" "syscfg\clb_config.c" "syscfg\clb_sim.cpp" "syscfg\c2000ware_libraries.opt" "syscfg\c2000ware_libraries.c" "clb_ex1_combinatorial_logic.out"
DEL /F "clb_ex1_combinatorial_logic.obj" "syscfg\board.obj" "syscfg\clb_config.obj" "syscfg\clb_sim.obj" "syscfg\c2000ware_libraries.obj" "device\device.obj" "device\f28003x_codestartbranch.obj"
DEL /F "clb_ex1_combinatorial_logic.d" "syscfg\board.d" "syscfg\clb_config.d" "syscfg\c2000ware_libraries.d" "device\device.d"
DEL /F "syscfg\clb_sim.d"
DEL /F "device\f28003x_codestartbranch.d"
RMDIR /S/Q "syscfg\"
找不到 C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\device\f28003x_codestartbranch.d
Finished clean
**** Build Finished ****
**** Build of configuration CPU1_RAM for project clb_ex1_combinatorial_logic ****
"C:\\ti\\ccs1240\\ccs\\utils\\bin\\gmake" -k -j 16 all -O
Building file: "../clb_ex1_combinatorial_logic.syscfg"
Invoking: SysConfig
"C:/ti/ccs1240/ccs/utils/sysconfig_1.17.0/sysconfig_cli.bat" -s "C:/ti/c2000/C2000Ware_5_00_00_00/.metadata/sdk.json" -d "F28003x" --script "C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/clb_ex1_combinatorial_logic.syscfg" -o "syscfg" --package 100PZ --part F28003x_100PZ --compiler ccs
Running script...
Validating...
info: myEPWM1(/driverlib/epwm.js) epwmTimebase_clockDiv: For perfectly synchronized TBCLKs across multiple EPWM modules, the prescaler bits in the TBCTL register of each EPWM module must be set identically
info: myEPWM1(/driverlib/epwm.js) epwmActionQualifier_t1Source: T1/T2 selection and configuration of a trip/digital-compare event is indpendent of the configuration of that event in the Trip-Zone submodule
info: myEPWM1(/driverlib/epwm.js) epwmActionQualifier_t2Source: T1/T2 selection and configuration of a trip/digital-compare event is indpendent of the configuration of that event in the Trip-Zone submodule
info: myEPWM2(/driverlib/epwm.js) epwmTimebase_clockDiv: For perfectly synchronized TBCLKs across multiple EPWM modules, the prescaler bits in the TBCTL register of each EPWM module must be set identically
info: myEPWM2(/driverlib/epwm.js) epwmActionQualifier_t1Source: T1/T2 selection and configuration of a trip/digital-compare event is indpendent of the configuration of that event in the Trip-Zone submodule
info: myEPWM2(/driverlib/epwm.js) epwmActionQualifier_t2Source: T1/T2 selection and configuration of a trip/digital-compare event is indpendent of the configuration of that event in the Trip-Zone submodule
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) $name: To utilize the CLB simulation, please see the "Generate CLB Simulation File" description within the Global Parameters in the Tile Design module.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.input_pipeline0: If this input is synchronous the input pipeline must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.in_sync_2_cycle_delay_0: If this input is asynchronous, synchronization must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.input_pipeline1: If this input is synchronous the input pipeline must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.in_sync_2_cycle_delay_1: If this input is asynchronous, synchronization must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.input_pipeline2: If this input is synchronous the input pipeline must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.in_sync_2_cycle_delay_2: If this input is asynchronous, synchronization must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.input_pipeline3: If this input is synchronous the input pipeline must be enabled. Check the device TRM for more details.
info: TILE1(/utilities/clb_tool/clb_syscfg/source/TILE) BOUNDARY.in_sync_2_cycle_delay_3: If this input is asynchronous, synchronization must be enabled. Check the device TRM for more details.
Generating Code (clb_ex1_combinatorial_logic.syscfg)...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\board.c...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\board.h...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\board.cmd.genlibs...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\board.opt...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\pinmux.csv...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\epwm.dot...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\clb_config.h...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\clb_config.c...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\clb.dot...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\clb_sim.cpp...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\clb_simulation.bat...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\c2000ware_libraries.cmd.genlibs...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\c2000ware_libraries.opt...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\c2000ware_libraries.c...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\c2000ware_libraries.h...
Writing C:\Users\admin\workspace_v12\clb_ex1_combinatorial_logic\CPU1_RAM\syscfg\clocktree.h...
Finished building: "../clb_ex1_combinatorial_logic.syscfg"
Building file: "syscfg/clb_sim.cpp"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="syscfg/clb_sim.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --obj_directory="syscfg" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "syscfg/clb_sim.cpp"
Finished building: "syscfg/clb_sim.cpp"
Building file: "../device/f28003x_codestartbranch.asm"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="device/f28003x_codestartbranch.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --obj_directory="device" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "../device/f28003x_codestartbranch.asm"
Finished building: "../device/f28003x_codestartbranch.asm"
Building file: "syscfg/c2000ware_libraries.c"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="syscfg/c2000ware_libraries.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --obj_directory="syscfg" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "syscfg/c2000ware_libraries.c"
Finished building: "syscfg/c2000ware_libraries.c"
Building file: "../clb_ex1_combinatorial_logic.c"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="clb_ex1_combinatorial_logic.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "../clb_ex1_combinatorial_logic.c"
Finished building: "../clb_ex1_combinatorial_logic.c"
Building file: "../device/device.c"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="device/device.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --obj_directory="device" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "../device/device.c"
Finished building: "../device/device.c"
Building file: "syscfg/clb_config.c"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="syscfg/clb_config.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --obj_directory="syscfg" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "syscfg/clb_config.c"
Finished building: "syscfg/clb_config.c"
Building file: "syscfg/board.c"
Invoking: C2000 Compiler
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/device" --include_path="C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib" --include_path="C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi --preproc_with_compile --preproc_dependency="syscfg/board.d_raw" --include_path="C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" --obj_directory="syscfg" --cmd_file="syscfg/board.opt" --cmd_file="syscfg/c2000ware_libraries.opt" "syscfg/board.c"
Finished building: "syscfg/board.c"
Building target: "clb_ex1_combinatorial_logic.out"
Invoking: C2000 Linker
"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcrc -Ooff --define=DEBUG --define=RAM --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi -z -m"clb_ex1_combinatorial_logic.map" --heap_size=0x100 --stack_size=0x200 --warn_sections -i"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/lib" -i"C:/ti/c2000/C2000Ware_5_00_00_00" -i"C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" -i"C:/ti/ccs1240/ccs/tools/compiler/ti-cgt-c2000_22.6.0.LTS/include" --reread_libs --define=RAM --diag_wrap=off --display_error_number --xml_link_info="clb_ex1_combinatorial_logic_linkInfo.xml" --entry_point=code_start --rom_model -o "clb_ex1_combinatorial_logic.out" "./clb_ex1_combinatorial_logic.obj" "./syscfg/board.obj" "./syscfg/clb_config.obj" "./syscfg/clb_sim.obj" "./syscfg/c2000ware_libraries.obj" "./device/device.obj" "./device/f28003x_codestartbranch.obj" "../28003x_generic_ram_lnk.cmd" "C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/f28003x/driverlib/ccs/Debug/driverlib.lib" -lc2000ware_libraries.cmd.genlibs -llibc.a
<Linking>
Finished building target: "clb_ex1_combinatorial_logic.out"
echo "========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
"========= Build of the CLB simulation has moved to the CLB Tool. Click the '?' icon by the _Generate CLB Simulation File_ enable for more details (located in the Global Parameters of the Tile Design SysConfig module) ============="
if 1 == 1 C:/ti/ccs1240/ccs/tools/node/node.exe "C:/ti/c2000/C2000Ware_5_00_00_00/utilities/clb_tool/clb_syscfg/dot_file_libraries/clbDotUtility.js" "C:/ti/c2000/C2000Ware_5_00_00_00/utilities/clb_tool/clb_syscfg/" "C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg" "C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg/clb.dot"
CLB block diagram SVG was created!
CLB block diagram HTML was created!
if 1 == 1 mkdir "C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/diagrams"
if 1 == 1 C:/ti/ccs1240/ccs/tools/node/node.exe "C:/ti/c2000/C2000Ware_5_00_00_00/driverlib/.meta/generate_diagrams.js" "C:/ti/c2000/C2000Ware_5_00_00_00" "C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/diagrams" "C:/Users/admin/workspace_v12/clb_ex1_combinatorial_logic/CPU1_RAM/syscfg"
Output file: adc
Output file: epwm
No input file!
Output file: clb
Block diagram HTML was created!
Block diagram SVG was created!
Block diagram SVG was created!
Block diagram HTML was created!
**** Build Finished ****
3.我双击clb_simulation.bat的时候出现了以下故障
